Come and join us! Intel is seeking highly qualified candidates to join the BXD (Barefoot Switching Division) in our Data Center Group (DCG) as an Architectural Modeling Engineer! We’re part of the Connectivity Group (CG) inside Intel’s DCG, and we’re looking for motivated, passionate and talented engineers to join our Architecture team. We’re a strong, vibrant cross-site team which helps drive Intel’s programmable switching technology and products to position Tofino as the switching platform of choice and for the Cloud and Data Center network deployments.

In this role, you will have the opportunity to drive modeling and validation on our high-performance P4 programmable switch ASIC architecture.

Responsibilities will include, but are not limited to:

• Work closely with Chip Architect to assess/evaluate various features and respective architecture choices, model them using high-level languages (C/C++/Python/any other/etc.), a complete trade-off analysis and publish results to the team.
• Develop/manage/improve full-scale performance model of the chip to validate final architecture choice, throughput, latency, buffering/scheduling tradeoffs, etc. The model(s) can be transaction accurate, cycle accurate, quick and dirty, etc. Chip performance model is expected to help chip verification team to validate performance matrix from RTL.
• Interact with Marketing and Software Teams may be required at times to gather feature requests

The ideal candidate will have the following skills in addition to the qualifications listed below.

• Must be a team player, with a demonstrated ability to technically influence others.
• Strong Problem-Solving skills.
• Excellent verbal and written communication skills.

In this position you will gain invaluable experience which will allow growth and expanded opportunities within this business group as well as future possible opportunities with other business groups within Intel.

The Data Center Group (DCG) drives new products technologies from high-end co-processors for supercomputers to low-energy systems for enterprise and the cloud, as well as solutions for big data and intelligent devices. The group is a worldwide organization that develops the products and technologies that power 9 of every 10 servers sold worldwide.

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Required Qualifications:

• Bachelor’s degree in Electrical Engineering or Computer Science +5 years industry experience.
• 5+ years of experience in C/C++ programming.
• 5+ years of experience in modeling, simulation and performance analysis
• 5+ years of experience with switch architecture, networking, active queue management, congestion control, buffer management, and QoS
• 5+ years of experience with event simulation software OMNeT++

Additional Preferred Qualifications:

• 5+ years of experience with STL libraries
• 5+ years of experience in Design verification with C++/SystemC programming
• 5+ years of experience with Python scripting
• Masters degree of PhD in Electrical Engineering or Computer Science +5 years industry experience

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